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LTC3523/LTC3523-2 1 3523f typical application features applications description synchronous 600ma step-up and 400ma step-down dc/dc converters the ltc ? 3523/LTC3523-2 combine a 600ma step-up dc/dc converter with a 400ma synchronous step-down dc/dc converter in a tiny 3mm 3mm package. the 1.2mhz/2.4mhz switching frequencies minimize the solution footprint while maintaining high ef? ciency. both converters feature soft-start and internal compensation, simplifying the design. both the step-up and step-down converters are current mode controlled and utilize an internal synchronous rec- ti? er for high ef? ciency. the step-up supports 0% duty cycle operation and the step-down converter supports 100% duty cycle operation to extend battery run time. if the mode pin is held high, both converters automati- cally transition between burst mode operation and pwm operation improving light load ef? ciency. fixed, low noise 1.2mhz/2.4mhz pwm operation is selected when mode is grounded. the LTC3523/LTC3523-2 provide a sub-2a shutdown mode, overtemperature shutdown and current limit pro- tection on both converters. the LTC3523/LTC3523-2 are housed in a 16-lead 3mm 3mm 0.75mm qfn package. LTC3523 ef? ciency and power loss vs load current dual high ef? ciency dc/dc converters: step-up (v out = 1.8v to 5.25v, i sw = 600ma) step-down (v out = 0.615v to 5.5v, i out = 400ma) 1.8v to 5.5v input voltage range up to 94% ef? ciency pin selectable burst mode ? operation 45a quiescent current in burst mode operation 1.2mhz (LTC3523) or 2.4mhz (LTC3523-2) switching frequency independent power good indicator outputs integrated soft-start thermal and overcurrent protection < 2a quiescent current in shutdown small 16-lead 3mm 3mm 0.75mm qfn package digital cameras medical instruments industrial handhelds gps navigators , lt, ltc, ltm and burst mode are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. + v in1 sw1 sw2 fb2 mode pgood2 shdn2 fb1 pgood1 shdn1 v out 10pf v in 10 f v out2 step-down output 1.2v 200ma 511k 511k 3523 ta01a 634k 365k 4.7 h 4.7 h v in2 LTC3523 v bat gnd1 gnd2 gnd3 47 f 2-cell alkaline v in 1.8v to 3.2v v out1 step-up output 3.3v 200ma 10 f off on off on load current (ma) 30 efficiency (%) power loss (mw) 90 100 20 10 80 50 70 60 40 0.1 10 100 1000 3523 ta01b 0 1000 10 100 1 0.1 1 step-up step-down v in = 2.4v v out1 = 3.3v v out2 = 1.2v f osc = 1.2mhz efficiency p0wer loss
LTC3523/LTC3523-2 2 3523f pin configuration absolute maximum ratings v in1 , v in2 , v bat , v out voltages .................... ?0.3v to 6v s h d n 1, pgood1, pgood2, fb1 voltages .. ?0.3v to 6v s h d n 2, fb2, mode voltages ...... ?0.3v to (v in2 + 0.3v) sw1 voltage dc .............................................................. 0.3v to 6v pulse < 100ns .......................................... ?0.3v to 7v sw2 voltage pulse < 100ns ......... ?0.3v to (v in2 + 0.3v) operating temperature range (notes 2, 3) .............................................. ?40c to 85c storage temperature range ................... ?65c to 125c (note 1) 16 15 14 13 5 6 7 8 top view 17 ud package 16-lead (3mm 3mm) plastic qfn 9 10 11 12 4 3 2 1fb1 v in1 pg00d1 v out fb2 pgood2 mode v in2 shdn1 v bat gnd3 shdn2 sw1 gnd1 gnd2 sw2 t jmax = 125c, ja = 68c/w exposed pad (pin 17) is gnd, must be soldered to pcb order information electrical characteristics parameter conditions min typ max units minimum start-up voltage i load = 1ma 1.6 1.8 v frequency accuracy LTC3523 LTC3523-2 0.9 1.8 1.2 2.4 1.5 2.65 mhz mhz quiescent current?shutdown v s h d n 1 = v s h d n 2 = 0v, v out = 0v, v in1 = v in2 = v bat 0.5 3 a quiescent current ?sleep measured from v supply , v in1 = v in2 = v bat = 2.4v 45 a quiescent current v out ? sleep measured from v out = 3.3v (note 4) 15 a s h d n 1, s h d n 2 input high 1v s h d n 1, s h d n 2 input low 0.35 v s h d n 1, s h d n 2 input current v s h d n = 5.5v 1.4 2 a pgood1, pgood2 threshold referenced to the feedback voltage ?6 ?9 ?14 % pgood1, pgood2 low voltage i pgood = 5.5ma 0.35 v pgood1, pgood2 leakage v pgood = 5.25v 0.01 1 a mode input high 1.0 v mode input low 0.35 v the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v in1 = v in2 = v in3 = 2.4v, v out = 3.3v, v out(step-down) = 1.2v unless otherwise speci? ed. lead free finish tape and reel part marking package description temperature range LTC3523eud#pbf LTC3523eud-2#pbf LTC3523eud#trpbf LTC3523eud-2#trpbf lcyc lddr 16-lead (3mm 3mm) plastic dfn 16-lead (3mm 3mm) plastic dfn ?40c to 85c ?40c to 85c consult ltc marketing for parts speci? ed with wider operating temperature ranges. consult ltc marketing for information on non-standard lead based ? nish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/
LTC3523/LTC3523-2 3 3523f note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reli- ability and lifetime. note 2: the LTC3523/LTC3523-2 are guaranteed to meet performance speci? cations from 0c to 85c. speci? cations over the C40c to 85c operating temperature range are assured by design, characterization and correlation with statistical process control. note 3: the LTC3523/LTC3523-2 include an overtemperature shutdown that is intended to protect the device during momentary overload condi- tions. junction temperature will exceed 125c when the overtemperature shutdown is active. continuous operation above the speci? ed maximum operating junction temperature may impair device reliability. electrical characteristics the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v in1 = v in2 = v in3 = 2.4v, v out = 3.3v, v out(step-down) = 1.2v unless otherwise speci? ed. parameter conditions min typ max units mode leakage current v mode = 5.5v 0.01 1 a soft-start time 500 s step-up converter input voltage range 1.8 5.25 v output voltage adjust range (note 6) 1.8 5.25 v feedback voltage fb1 1.16 1.20 1.23 v feedback input current fb1 v fb1 = 1.25v 0 50 na n-channel switch leakage v sw = 5.5v 0.20 2 a p-channel switch leakage v sw = 5.5v, v out = 0v 0.20 2 a n-channel switch on resistance v out = 3.3v, i sw = 100ma v out = 5v, i sw = 100ma 0.36 0.22 p-channel switch on resistance v out = 3.3v, i sw = 100ma v out = 5v, i sw = 100ma 0.33 0.31 peak inductor current (note 7) 600 1000 ma current limit delay to output (note 6) 40 ns maximum duty cycle v fb = 1v 80 87 % minimum duty cycle v fb = 1.5v 0% step-down converter input voltage range 1.8 5.5 v output voltage range (note 6) 0.615 5.25 v feedback voltage fb2 585 600 615 mv feedback input current fb2 v fb2 = 0.625v 0 50 na reference voltage line regulation i out = 100ma (notes 5, 6) 0.04 %/v output voltage line regulation i out = 100ma, 1.6v < v in < 5.5v (note 6) 0.04 %/v output voltage load regulation i out = 0ma to 600ma (note 6) 1.0 % maximum duty cycle 100 % peak inductor current (note 7) 400 650 ma n-channel switch on resistance v in2 = 2.4v 0.33 p-channel switch on resistance v in2 = 2.4v 0.58 sw leakage v ? s ? h ? d ? n ? 2 = 0v, v sw2 = 0v or 5v, v in = 5.5v 0.20 2 a note 4: current is measured into the v out pin since the supply is boot- strapped to the output for the step-up. the current will re? ect to the input supply by: (v out /v in ) ? ef? ciency. the outputs are not switching in sleep. note 5: the LTC3523/LTC3523-2 are tested in a propriety test mode that connects fb2 to the output of the error ampli? er. note 6: speci? cation is guaranteed by design and not 100% tested in production. note 7: current measurements are performed when the LTC3523/ LTC3523-2 are not switching. the current limit values in operation will be somewhat higher due to the propagation delay of the comparator.
LTC3523/LTC3523-2 4 3523f typical performance characteristics normalized fbx reference vs temperature inrush current control for the step-up converter inrush current control for the step-down converter load transient response step-up load transient response step-down current limit vs temperature r ds(on) vs input voltage for the step-down converter normalized oscillator frequency vs temperature temperature ( c) ?5 ?5 ? normalized fbx voltage (v) 1.00000 1.00125 75 3523 g01 0.99875 0.99500 0.99750 0.99625 15 35 55 temperature ( c) ?5 ?5 ? normalized frequency (hz) 1.00 1.05 75 3523 g02 0.95 15 35 55 v out_bst 2v/div i l_bst 200ma/div shdn1 2v/div 200 s/div 3523 g03 v out = 3.3v v in = 2.4v c out = 10 f l1 = 4.7 h v out_bck 1v/div i l_bck 200ma/div 200 s/div 3523 g04 v out = 1.2v v in = 2.4v c out = 10 f l1 = 4.7 h shdn2 2v/div output ripple 20mv/div load current 50ma/div 500 s/div 3523 g05 v out = 3.3v v in = 2.4v c out = 10 f l1 = 4.7 h 20ma to 70ma step output ripple 20mv/div load current 20ma/div 500 s/div 3523 g06 v out = 1.2v v in = 2.4v c out = 47 f l1 = 4.7 h c f = 68pf 10ma to 30ma step r ds(on) vs output voltage for the step-up converter temperature ( c) ?5 current limit (a) 0.8 1.0 1.2 35 75 3523 g07 0.6 0.4 ?5 ? 15 55 0.2 0 boost current limit buck current limit input voltage (v) 1 r ds(on) ( ) 0.40 0.60 5 3523 g08 0.20 0 2 3 4 1.5 2.5 3.5 4.5 0.80 0.30 0.50 0.10 0.70 pmos nmos output voltage (v) 1 0 r ds(0n) ( ) 0.05 0.15 0.20 0.25 0.50 0.35 2 3 3.5 3532 g09 0.10 0.40 0.45 0.30 1.5 2.5 4 4.5 5 pmos nmos (t a = 25c unless otherwise noted)
LTC3523/LTC3523-2 5 3523f normalized r ds(on) vs temperature step-up no-load input current vs v in pin functions fb1 (pin 1): step-up converter feedback input to the er- ror ampli? er. connect resistor divider tap to this pin. the output voltage can be adjusted from 1.8v to 5.25v by: v out(step-up) =+ ? ? ? ? ? ? 12 1 1 2 . v r r see block diagram. v in1 (pin 2): step-up converter power voltage input. this pin can be connected to a different supply than v in2 . this pin must be connected to a valid supply voltage. pgood1 (pin 3): step-up converter power good com- parator output. this open-drain output is pulled low when v fb1 < C9% of its regulation voltage. v out (pin 4): step-up converter output voltage sense input and drain of the internal synchronous recti? er mosfet. driver bias is derived from v out . pcb trace length from v out to the output ? lter capacitor(s) should be as short and wide as possible. mode transition response temperature ( c) ?5 normalized r ds(on) ( ) 1.2 15 3523 g10 0.9 0.7 ?5 ? 35 0.6 0.5 1.3 1.1 1.0 0.8 55 75 pmos nmos input voltage (v) 1.5 0 input current ( a) 50 150 200 250 500 350 2.5 3.5 4 3523 g11 100 400 450 300 2 3 4.5 5 v out = 5v v out = 3.3v v out = 2.8v v out_bst 50mv/div v out_bck 20mv/div mode 2v/div 200 s/div 3523 g12 v out1 = 3.3v v out2 = 1.2v v in = 2.4v i out1 = 20ma i out2 = 25ma c out1 = c out2 = 10 f l1 = l2 = 4.7 h maximum i out vs v in for the step-up converter maximum i out vs v in for the step-down converter input voltage (v) 1 0 maximum output current (ma) 50 150 200 250 500 350 2 3 3523 g13 100 400 450 300 4 5 v out = 2.5v v out = 3.3v v out = 5v input voltage (v) 1 maximum output current (ma) 250 300 350 5 3523 g14 200 150 0 2 3 4 1.5 2.5 3.5 4.5 100 50 450 400 v out = 2.5v v out = 1.8v v out = 1.2v typical performance characteristics (t a = 25c unless otherwise noted)
LTC3523/LTC3523-2 6 3523f pin functions sw1 (pin 5): step-up converter switch pin. connect the inductor between sw1 and v in1 . keep these pcb trace lengths as short and wide as possible to reduce emi and voltage overshoot. if the inductor current falls to zero or ? s ? h ? d ? n ? 1 is low, an internal 100 anti-ringing switch is connected from sw1 to v in1 to minimize emi. gnd1 (pin 6): step-up converter power ground. connect this pin to the ground plane. gnd2 (pin 7): step-down converter power ground. con- nect this pin to the ground plane. sw2 (pin 8): step-down converter switch pin. connect one end of the inductor to sw2. keep these pcb trace lengths as short and wide as possible to reduce emi and voltage overshoot. v in2 (pin 9): step-down converter power voltage input. this pin can be connected to a different supply than v in1 . this pin must be connected to a valid supply voltage. mode (pin 10): step-up and step-down converter mode selection pin. do not leave this pin ? oating. ? mode = low: pwm mode ? mode = high: automatic burst mode operation pgood2 (pin 11): step-down converter power good comparator output. this open-drain output is pulled low when v fb2 < C9% of its regulation voltage. fb2 (pin 12): step-down converter feedback input to the error ampli? er. connect resistor divider tap to this pin. the output voltage can be adjusted from 0.6v to 5.5v by: v out(step-down) =+ ? ? ? ? ? ? 06 1 3 4 . v r r see block diagram. if large feedback resistors, above 500k are used, then it will be necessary to use a lead capacitor connected to the output voltage and fb2. ? s ? h ? d ? n ? 2 (pin 13): step-down converter logic controlled shutdown input. do not leave this pin ? oating. ? ? s ? h ? d ? n ? 2 = high: normal free-running operation, 1.2mhz/2.4mhz typical operating frequency. ? ? s ? h ? d ? n ? 2 = low: shutdown, quiescent current < 1a. this pin cannot exceed the voltage on v in2 . gnd3 (pin 14): analog ground. the feedback voltage dividers for each converter must be returned to gnd3 for best performance. note: when laying out your pcb provide a short direct path between gnd1 and the (C) side of the step-up output capacitor(s) and gnd2 and the step-down output capaci- tor.these pins are not connected together internally. v bat (pin 15): analog voltage input. connect this pin to the higher of v in1 or v in2 . ? s ? h ? d ? n ? 1 (pin 16): step-up converter logic controlled shutdown input. ? ? s ? h ? d ? n ? 1 = high: normal free-running operation, 1.2mhz/2.4mhz typical operating frequency. ? ? s ? h ? d ? n ? 1 = low: shutdown, quiescent current < 1a. this pin cannot exceed the voltage on v in1 . exposed pad (pin 17): die attach pad must be soldered to pcb ground for electrical contact and optimum thermal performance.
LTC3523/LTC3523-2 7 3523f block diagram 16 shdn1 v in 1.8v to 5.5v 2 + pwm logic and drivers shutdown and v bias anti-ring l1 4.7 h v in1 3 pgood1 15 10 v bat 9 v in2 sw1 v out c in 47 f c c2 c out 10 f v out step-up 1.8v to 5.25v v out step-down 0.615v to 5.5v 1.2v r1 r2 c out 10 f r4 r3 mode g m error amplifier zero current comp c c1 r z c c1 gnd3 r z 5 4 fb1 step-up step-down shared mode 1 sw2 0.6v gnd2 l2 4.7 h 8 fb2 3523 bd bulk control signals current sense i zero comp shdn mode osc slp + + pwm/i lim comp pwm/i lim comp i lim ref slope compensation pwm logic and drivers v out limit comp mode osc i lim ref 0a shutdown and v bias shdn + + + + slp + 1.2v ?% fb1 osc 0.6v 1.2v 1v slp + + + mode mode start-up soft-start and therm reg g m error amplifier mode start-up soft-start and therm reg oscillator reference thermal shdn 11 pgood2 13 14 shdn2 0.6v ?% fb2 + slope compensation + + 0.6v 12 gnd2 7 gnd1 6
LTC3523/LTC3523-2 8 3523f operation the LTC3523 and LTC3523-2 are synchronous step-up and step-down converters housed in a 16-pin qfn package. operating from inputs down to 1.8v, the devices feature ? xed frequency, current mode pwm control for exceptional line and load regulation and transient response. with low r ds(on) and internal mosfet switches, the devices maintain high ef? ciency over a wide range of load cur- rent. operation can be best understood by referring to the block diagram. soft-start both the step-up and step-down converters on the LTC3523 /LTC3523-2 provide soft-start. the soft-start time is typi- cally 500s. the soft-start function resets in the event of a commanded shutdown or thermal shutdown. oscillator the frequency of operation is set by an internal oscilla- tor to a nominal 1.2mhz for the LTC3523 and nominal 2.4mhz for the LTC3523-2. the oscillator is shared by both converters. shutdown the step-up and the step-down converters have inde- pendent shutdown pins. to shut down a converter, pull ? s ? h ? d ? n ? x below 0.35v. to enable a converter, pull ? s ? h ? d ? n ? x above 1.0v. error ampli? ers power converter control loop compensation is provided internally for each converter. the noninverting input is internally connected to the 1.2v reference for the step-up and 0.6v for the step-down. the inverting input is connected to the respective fbx for both converters. internal clamps limit the minimum and maximum error amp output voltage for improved large signal transient response. a voltage divider from v out to ground programs the output voltage via the respective fbx pins from 1.8v to 5.25v for the step- up and 0.615v to 5.5v for the step-down. from the block diagram the design equation for programming the output voltages is v out = 1.2v ? [1 + (r1/r2)] for the step-up and v out = 0.6v ? [1 + (r3/r4)] for the step-down. pwm comparators the pwm comparators are used to compare the converters external inductor current to the current commanded by the error ampli? ers. when the inductor current reaches the current commanded by the error ampli? er the induc- tor charging cycle is terminated and the recti? cation cycle commences. current limit the current limit comparator shuts off the n-channel switch for the step-up and p-channel switch for the step-down once its current limit threshold is reached. the current limit comparator delay to output is typically 40ns. peak switch current is limited to approximately 900ma for the step-up and 650ma for the step-down independent of input or output voltage. zero current comparator the zero current comparator monitors the inductor cur- rent to the output and shuts off the synchronous recti? er once this current reduces to approximately 20ma. this prevents the inductor current from reversing in polarity improving ef? ciency at light loads. power good comparator both converters have independent open drain power good comparators which monitor the output voltage via their respective fbx pins. the comparator output will allow the pgoodx to be pulled up high when the output voltage (v out ) has exceeded 91% of it ? nal value. if the output voltage decreases below 91%, the comparator will pull the pgoodx pin to ground. the step-up comparator has 3.3% of hysteresis and the step-down has 6.6% relative to fbx voltage for added noise immunity. step-down overvoltage comparator the step-down overvoltage comparator guards against transient overshoots greater than 10% of the output volt- age by turning the p-channel switch off until the transient has subsided.
LTC3523/LTC3523-2 9 3523f applications information step-up anti-ringing control the anti-ring circuitry connects a resistor across the in- ductor to prevent high frequency ringing on the sw1 pin during discontinuous current mode operation. the ringing of the resonant circuit formed by l and c sw (capacitance on sw pin) is low energy, but can cause emi radiation. step-up output disconnect the LTC3523/LTC3523-2 step-up is designed to provide true output disconnect by eliminating body diode conduc- tion of the internal p-channel mosfet recti? er. this allows for v out to go to zero volts during shutdown, drawing no current from the input source. controlling the p-channel operation mosfet body diode also enables inrush current limiting at turn-on, minimizing surge currents seen by the input supply. note that to obtain the advantages of output dis- connect, an external schottky diode cannot be connected between sw1 and v out . thermal shutdown if the die temperature reaches 160c, the part will go into thermal shutdown. all switches will be turned off and the soft-start capacitor will be discharged. the device will be enabled again when the die temperature drops by ap- proximately 15c. pcb layout guidelines the high speed operation of the LTC3523/LTC3523-2 demands careful attention to board layout. you will not get advertised performance with careless layout. figure 1 shows the recommended component placement. a large ground pin copper area will help to lower the chip tem- perature. a multilayer board with a separate ground plane is ideal, but not absolutely necessary. component selection inductor selection the LTC3523/LTC3523-2 can utilize small surface mount and chip inductors due to its fast 1.2mhz switching frequency and for the 2.4mhz version, the values are halved. the inductor current ripple is typically set for 20% to 40% of the peak inductor current (i p ). high figure 1. recommended component placement for double layer board
LTC3523/LTC3523-2 10 3523f frequency ferrite core inductor materials reduce frequency dependent power losses compared to cheaper powdered iron types, improving ef? ciency. the inductor should have low esr (series resistance of the windings) to reduce the i 2 r power losses, and must be able to handle the peak inductor current without saturating. molded chokes and some chip inductors usually do not have enough core to support the peak inductor currents of 1000ma seen on the LTC3523/LTC3523-2. to minimize radiated noise, use a toroid, pot core or shielded bobbin inductor. see table 1 for suggested inductors and suppliers. step-up: for the step-up converter a minimum inductance value of 3.3h is recommended for 3.6v and lower output voltage applications, and a 4.7h for output voltages greater than 3.6v. larger values of inductance will allow greater output current capability by reducing the inductor ripple current. increasing the inductance above 10h will increase size while providing little improvement in output current capability. step-down: for most applications, the value of the inductor will fall in the range of 3.3h to 10h, depending upon the amount of current ripple desired. a reasonable point to start is to set the current ripple at 30% of the output current. note that larger values of inductance will allow greater output current capability by reducing the inductor ripple current. increasing the inductance above 10h will increase size while providing little improvement in output current capability. a 4.7h inductor will work well for most li-ion or 2-cell alkaline/nimh cell applications output and input capacitor selection low esr (equivalent series resistance) capacitors should be used to minimize the output voltage ripple. multilayer ceramic capacitors are an excellent choice as they have extremely low esr and are available in small footprints. step-up: a 2.2f to 10f output capacitor is suf? cient for most applications. larger values up to 22f may be used to obtain extremely low output voltage ripple and improve transient response. an additional phase lead capacitor con- nected between v out and fb1 may be required with output capacitors larger than 10f to maintain acceptable phase margin. x5r and x7r dielectric materials are preferred for their ability to maintain capacitance over wide voltage and temperature ranges. step-down: low esr input capacitors reduce input switching noise and reduce the peak current drawn from the battery. it follows that ceramic capacitors are also a good choice for input decoupling and should be located as close as possible to the device. table 2 shows the range of acceptable capacitors for a given programmed output voltage. minimum capacitance values in the table applications information table 1. recommended inductors part l (h) maximum current (ma) dcr ( ) dimensions (mm) (l w h) manufacturer me3220 4.7 to 15 1200 to 700 0.19 to 0.52 3.2 2.5 2.0 coil craft www.coilcraft.com lps3010 4.7 to 10 720 to 510 0.3 to 0.54 3.0 3.0 1.0 do2010 4.7 to 15 800 to 510 0.8 to 1.84 2.0 2.0 1.0 sd3112 4.7 to 15 740 to 405 0.25 to 0.65 3.1 3.1 1.2 cooper www.cooperet.com mip3226d 4.7 to 10 600 to 200 0.1 to 0.16 3.2 2.6 1.0 fdk www.fdk.com lqh32cn 4.7 to 15 650 to 300 0.15 to 0.58 3.2 2.5 1.5 murata www.murata.com lqh2mc 4.7 to 15 300 to 200 0.8 to 1.6 2 1.6 0.9 cdrh3d16 4.7 to 15 900 to 450 0.11 to 0.29 3.8 3.8 1.8 sumida www.sumida.com cdrh2d14 4.7 to 12 680 to 420 0.12 to 0.32 3.2 3.2 1.5 nr3010 4.7 to 15 750 to 400 0.19 to 0.74 3.0 3.0 1.0 taiyo yuden www.t-yuden.com nr3015 4.7 to 15 1000 to 560 0.12 to 0.36 3.0 3.0 1.5
LTC3523/LTC3523-2 11 3523f applications information will increase loop bandwidth resulting in a faster transient response. maximum capacitance values will produce lower ripple. table 3 shows a list of several ceramic capacitor manufacturers. consult the manufacturers directly for detailed information on their entire selection of ceramic parts. table 2. step-down output capacitor range vs programmed output voltage v out minimum capacitance (f) maximum capacitance (f) 0.8 8.4 33.6 1.2 5.6 22.4 1.5 4.5 17.9 1.8 3.7 14.9 2.5 2.7 10.7 5 1.3 5.4 table 3. capacitor vendor information supplier phone website avx (803) 448-9411 www.avxcorp.com murata (714) 852-2001 www.murata.com taiyo-yuden (408) 573-4150 www.t-yuden.com step-up v in > v out operation the LTC3523/LTC3523-2 step-up converters will maintain voltage regulation when the input voltage is above the output voltage. since this mode will dissipate more power, the maximum output current is limited in order to maintain an acceptable junction temperature and is given by: i t vv t out max a in out () ? = + () ? ? ? ? 250 136 1 5 where t a = ambient temperature. for example, at v in = 4.5v, v out = 3.3v and t a = 85c, the maximum output current is limited to 449ma. short-circuit protection the LTC3523/LTC3523-2s step-up output disconnect feature allows output short circuit while maintaining a maximum internally set current limit. however, the LTC3523/LTC3523-2 also incorporate internal features such as current limit foldback and thermal shutdown for protection from an excessive overload or short circuit. during a prolonged short circuit of v out less than 950mv, the current limit folds back to 2/3 the normal current limit. this 2/3 current limit remains in effect until v out exceeds 1v, at which time the normal internal set current limit is restored. when the LTC3523/LTC3523-2 step-down converters out- put is shorted to ground, the step-down uses a comparator to limit the current through the synchronous rectifying n-channel switch to 650ma. if this limit is exceeded, the p-channel switch is inhibited from turning on until the current through the synchronous rectifying n-channel switch falls below 650ma. thermal considerations to deliver the LTC3523/LTC3523-2s full-rated power, it is imperative that a good thermal path be provided to dis- sipate the heat generated within the package. this can be accomplished by taking advantage of the large thermal pad on the underside of the LTC3523/LTC3523-2. it is recom- mended that multiple vias in the printed circuit board be used to conduct heat away from the LTC3523/LTC3523-2 and into the copper plane with as much area as possible. in the event that the junction temperature gets too high, the LTC3523/LTC3523-2 will go into thermal shutdown and all switching will cease until the internal temperature drops to a safe level at which point the soft-start cycle will be initiated.
LTC3523/LTC3523-2 12 3523f dual buck-boost and step-up converter operation the LTC3523/LTC3523-2 can be operated in a cascaded con? guration as shown in figure 2, allowing buck-boost and step-up converter operation. supply rail sequencing is achieved by feeding the step-up converter pgood1 into the step-downs ? s ? h ? d ? n ? 2 pin. note that the overall 3.3v converter ef? ciency is the product of the individual ef? ciencies. v in1 sw1 sw2 fb2 mode pgood2 shdn2 fb1 v in pgood1 shdn1 v out 10pf 10 f v out2 step-down output 3.3v 50ma 825k 182k v in 3523 f02a 768k 243k 100k 4.7 f 10 f v in2 LTC3523 v bat gnd1 gnd2 gnd3 4.7 f v in 1.8v to 5.25v v out1 step-up output 5v 100ma 10 f off on figure 2. dual converter ef? ciency (load applied to step-down output) applications information output current (ma) 0.1 0 efficiency (%) 10 30 40 50 100 70 1 10 3523 f02b 20 80 90 60 100 1000 3.3v output 5v output v in = 2.4v v out1 = 5v v out2 = 3.3v f osc = 1.2mhz burst enabled
LTC3523/LTC3523-2 13 3523f typical applications + v in1 sw1 sw2 fb2 mode pgood2 shdn2 fb1 pgood1 shdn1 v out 10pf v in 10 f v out2 step-down output 1.2v 200ma 511k 511k 100k 3523 ta02a 634k 365k 4.7 h 4.7 h v in2 LTC3523 v bat gnd1 gnd2 gnd3 4.7 f 2-cell alkaline v in 1.8v to 3.2v v out1 step-up output 3.3v 200ma 4.7 f off on power sequence operation v out1 2v/div pgood2 shdn2 500 s/div 3523 ta02b v out2 1v/div
LTC3523/LTC3523-2 14 3523f typical applications v in1 sw1 sw2 fb2 mode pgood2 shdn2 fb1 pgood1 shdn1 v out 10pf 10 f v out2 step-down output 2.5v 200ma 768k 243k v in 3523 ta03 768k 243k 4.7 h 10 h v in2 LTC3523 v bat gnd1 gnd2 gnd3 4.7 f li-ion v in 2.5v to 4.2v v out1 step-up output 5v 150ma 10 f off on off on + li-ion to 5v/150ma, 2.5v/200ma load current (ma) 0 0 efficiency (%) power loss (mw) 10 30 40 50 100 70 1 10 3523 ta03b 20 80 90 60 0 1 10 1000 100 100 1000 step-up step-down v in = 3.6v v out1 = 5v v out2 = 2.5v f osc = 1.2mhz efficiency p0wer loss ef? ciency and power loss vs load current
LTC3523/LTC3523-2 15 3523f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description 3.00 0.10 (4 sides) recommended solder pad pitch and dimensions 1.45 0.05 (4 sides) note: 1. drawing conforms to jedec package outline mo-220 variation (weed-2) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 bottom view?xposed pad 1.45 0.10 (4-sides) 0.75 0.05 r = 0.115 typ 0.25 0.05 1 pin 1 notch r = 0.20 typ or 0.25 45 chamfer 15 16 2 0.50 bsc 0.200 ref 2.10 0.05 3.50 0.05 0.70 0.05 0.00 ?0.05 (ud16) qfn 0904 0.25 0.05 0.50 bsc package outline ud package 16-lead plastic qfn (3mm 3mm) (reference ltc dwg # 05-08-1691)
LTC3523/LTC3523-2 16 3523f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2008 lt 0208 ? printed in usa related parts part number description comments ltc3400/ltc3400b 600ma (i sw ), 1.2mhz, synchronous step-up dc/dc converters 92% ef? ciency, v in : 0.85v to 5v, v out(max) = 5v, i q = 19a/300a, i sd < 1a, thinsot tm package ltc3401 1a (i sw ), 3mhz, synchronous step-up dc/dc converter 97% ef? ciency, v in : 0.85v to 5v, v out(max) = 5.5v, i q = 38a, i sd < 1a, 10-pin ms package ltc3402 2a (i sw ), 3mhz, synchronous step-up dc/dc converter 97% ef? ciency, v in : 0.85v to 5v, v out(max) = 5.5v, i q = 38a, i sd < 1a, 10-pin ms package ltc3421 3a (i sw ), 3mhz, synchronous step-up dc/dc converter with output disconnect converter 94% ef? ciency, v in : 0.85v to 4.5v, v out(max) = 5.25v, i q = 12a, i sd < 1a, 24-pin (4mm 4mm) qfn package ltc3422 1.5a (i sw ), 3mhz, synchronous step-up dc/dc with output disconnect converter 94% ef? ciency, v in : 0.85v to 4.5v, v out(max) = 5.25v, i q = 25a, i sd < 1a, 10-pin (3mm 3mm) dfn package ltc3426 2a (i sw ), 1.5mhz, step-up dc/dc converter 92% ef? ciency, v in : 1.6v to 5.5v, v out(max) = 5v, i q = 600a, i sd < 1a, thinsot package ltc3427 500ma (i sw ), 1.25mhz, synchronous step-up dc/dc with output disconnect converter 94% ef? ciency, v in : 1.8v to 5v, v out(max) = 5.25v, i q = 350a, i sd < 1a, 6-pin (2mm 2mm) dfn package ltc3429/ltc3429b 600ma (i sw ), 550khz, synchronous step-up dc/dc converters soft-start/output disconnect 96% ef? ciency, v in : 0.85v to 4.3v, v out(max) = 5v, i q = 20a, i sd < 1a, thinsot package ltc3459 80ma (i sw ), synchronous step-up dc/dc converter 92% ef? ciency, v in : 1.5v to 5.5v, v out(max) = 10v, i q = 10a, i sd < 1a, thinsot package ltc3525-3 ltc3525-3.3 ltc3525-5 400ma (i sw ), synchronous step-up dc/dc converters with output disconnect 94% ef? ciency, v in : 0.85v to 4v, v out(max) = 5v, i q = 7a, i sd < 1a, sc-70 package ltc3526/ltc3526l ltc3526b 500ma (i sw ), 1mhz synchronous step-up dc/dc converters with output disconnect 94% ef? ciency, v in : 0.85v to 5v, v out(max) = 5.25v, i q = 9a, i sd < 1a, 6-pin (2mm 2mm) dfn package ltc3528/ltc3528b 1a (i sw ), 1mhz synchronous step-up dc/dc converters with output disconnect 94% ef? ciency, v in : 0.85v to 5v, v out(max) = 5.25v, i q = 10a, i sd < 1a, 8-pin (2mm 3mm) dfn package thinsot is a trademark of linear technology corporation.

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